4G 低杂讯放大器

RichWave

立积电子

15.625MHZ TO 62.5MHZ, 1:4 LVCMOS/ LVTTL Zero Delay Clock Buffer

FEATURES • Four LVCMOS/LVTTL outputs, 7Ω typical output impedance • Single LVCMOS/LVTTL clock input • CLK accepts the following input levels: LVCMOS or LVTTL • Output frequency range: 15.625MHz to 62.5MHz • Input frequency range: 15.625MHz to 62.5MHz • VCO range: 250MHz to 500MHz • External

文件：419.15 Kbytes 页数：14 Pages

RENESAS

瑞萨

Output frequency range

文件：219.51 Kbytes 页数：13 Pages

IDT

28 (7/36) AWG Tinned Copper

文件：410.39 Kbytes 页数：4 Pages

ALPHAWIRE