RC22504A中文资料FemtoClock®2 Clock Generator数据手册Renesas规格书

描述 Description

The RC22504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs (max). The RC22504A can act as a frequency synthesizer to locally generate the reference clock or as a DCO for frequency margining or OTN clock applications.

特性 Features

• Jitter below 100fs RMS maximum (10Hz to 20MHz)
• PLL core consists of fractional-feedback Analog PLL (APLL)
• Operates from a 25MHz to 80MHz crystal or XO
• APLL frequency independent of input / crystal frequency
• Operates as a frequency synthesizer or Digitally Controlled Oscillator (DCO)
• DCO has tuning granularity of < 1ppb