FemtoClock®2 Sub-100fs Frequency Synthesizer

Features • Jitter as low as 64 fs RMS maximum (10Hz to 20MHz) • PLL core consists of fractional-feedback Analog PLL (APLL) ○ Operates from a 25MHz to 80MHz crystal or XO ○ APLL frequency independent of input / crystal frequency ○ Operates as a frequency synthesizer or Digitally Controlled

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FemtoClock®2 Clock Generator

The RC22504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs (max). The RC22504A can act as a frequency synthesizer to locally generate the reference clock • Jitter below 100fs RMS maximum (10Hz to 20MHz)\n• PLL core consists of fractional-feedback Analog PLL (APLL)• Operates from a 25MHz to 80MHz crystal or XO\n• APLL frequency independent of input / crystal frequency\n• Operates as a frequency synthesizer or Digitally Controlled Oscillator (DCO)\n• D;

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Package：24-WFQFN 裸露焊盘；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：FEMTOCLOCK 2 SYNTHESIZER

Renesas Electronics America Inc

Package：24-WFQFN 裸露焊盘；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC TRANSLATOR UNIV FREQ 48VFQFN

Renesas Electronics America Inc