PCIe Gen6 4-Output Clock Buffer

The RC19004 is a 4-output PCIe Gen6 buffer that is backward compatible to earlier PCIe generations. The RC19004 provides ultra-low additive jitter and reduced in-to-out delay performance for better design-margin and incorporates several features for easier and more robust design. • LP-HCSL outputs eliminate up to 16 terminated resistors\n• PCIe Gen 1–6 compliance\n• Drive both source-terminated and double-terminated loads\n• Selectable output slew rate via pin\n• Support both 85Ω and 100Ω output impedance versions\n• Open-drain LOS (Loss-Of-Signal) indication output\n• Power;

Renesas

瑞萨

PCIe Gen5/6 Fanout Buffer Family with LOS

Features ▪ PCIe Gen5 additive phase jitter: 6fs RMS ▪ PCIe Gen6 additive phase jitter: 4fs RMS ▪ DB2000Q additive phase jitter: 10fs RMS ▪ 12kHz to 20MHz additive phase jitter: 30fs RMS at 156.25MHz ▪ Power Down Tolerant (PDT) inputs ▪ Flexible Startup Sequencing (FSS) ▪ Automatic Clock Pa

文件：2.80466 Mbytes 页数：109 Pages

RENESAS

瑞萨

PCIe Gen5/6 Fanout Buffer Family with LOS

Features ▪ PCIe Gen5 additive phase jitter: 6fs RMS ▪ PCIe Gen6 additive phase jitter: 4fs RMS ▪ DB2000Q additive phase jitter: 10fs RMS ▪ 12kHz to 20MHz additive phase jitter: 30fs RMS at 156.25MHz ▪ Power Down Tolerant (PDT) inputs ▪ Flexible Startup Sequencing (FSS) ▪ Automatic Clock Pa

文件：2.80466 Mbytes 页数：109 Pages

RENESAS

瑞萨

PCIe Gen5/6 Fanout Buffer Family with LOS

Features ▪ PCIe Gen5 additive phase jitter: 6fs RMS ▪ PCIe Gen6 additive phase jitter: 4fs RMS ▪ DB2000Q additive phase jitter: 10fs RMS ▪ 12kHz to 20MHz additive phase jitter: 30fs RMS at 156.25MHz ▪ Power Down Tolerant (PDT) inputs ▪ Flexible Startup Sequencing (FSS) ▪ Automatic Clock Pa

文件：2.80466 Mbytes 页数：109 Pages

RENESAS

瑞萨

PCIe Gen5/6 Fanout Buffer Family with LOS

Features ▪ PCIe Gen5 additive phase jitter: 6fs RMS ▪ PCIe Gen6 additive phase jitter: 4fs RMS ▪ DB2000Q additive phase jitter: 10fs RMS ▪ 12kHz to 20MHz additive phase jitter: 30fs RMS at 156.25MHz ▪ Power Down Tolerant (PDT) inputs ▪ Flexible Startup Sequencing (FSS) ▪ Automatic Clock Pa

文件：2.80466 Mbytes 页数：109 Pages

RENESAS

瑞萨

包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC

Renesas Electronics America Inc

包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC

Renesas Electronics America Inc