PL133-21数据手册集成电路（IC）的时钟缓冲器驱动器规格书PDF

描述 Description

The PL133-21 is an advancedfanout buffer design for high performance, low-power, small form-factorapplications.  The PL133-21 accepts areference clock input of 1MHz to 150MHz and produces two outputs of the samefrequency.  Reference clock inputs may beLVCMOS or sine-wave signals (the inputs are internally AC-coupled).  PL133-21 is designed to fit in a small 2 x1.3 x 0.6mm DFN package, and offers the best phase noise and jitter performanceand lowest power consumption of any comparable IC.

特性 Features

• 2 LVCMOS Outputs
• Input/Output Frequency: 1MHz to 150MHz
• Supports LVCMOS or Sine Wave Input Clock
• Output Enable (OE) only controls CLK0
• CLK1 is always on
• Extremely low additive Jitter
• 8 mA Output Drive Strength
• Low Current Consumption
• Single 1.8V, 2.5V, or 3.3V, ±10% Power Supply
• Operating Temperature Range: 0°C to 70°C (Commercial), 0 -40°C to 85°C (Industrial)
•Available in DFN-6L GREEN/RoHS Compliant Packages

简介

PL133-21属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的PL133-21时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。