MT4S101T

Marking：P7；Package：TESQ；Bipolar Small-Signal Transistors

MOSGT30F12630F12630A/330VIGBTTO-220F Toshiba30F126GT30F126 Referencesite:http://monitor.net.ru/forum/30f126-info-494727.html ReferencePDF(30F124,30F125,30F127,30F128,30F131) :http://pdf.datasheetbank.com/pdf/Toshiba/190505.pdf

MT4S101U

Marking：P7；Package：USQ；Bipolar Small-Signal Transistors

MOSGT30F12630F12630A/330VIGBTTO-220F Toshiba30F126GT30F126 Referencesite:http://monitor.net.ru/forum/30f126-info-494727.html ReferencePDF(30F124,30F125,30F127,30F128,30F131) :http://pdf.datasheetbank.com/pdf/Toshiba/190505.pdf

NZ8P3V3MX2WT5G

Marking：P7；Zener Protection Diode

Features •FullRangeofWorkingVoltageOptions •HighESDRatings •WettableFlankPackageforOptimalAutomatedOpticalInspection (AOI) •SZPrefixforAutomotiveandOtherApplicationsRequiringUnique SiteandControlChangeRequirements;AEC−Q101Qualifiedand PPAPCapable •TheseD

74AUP3G07GN

Marking：p7；Package：XSON8；Low-power triple buffer with open-drain output

74AUP3G07GS

Marking：p7；Package：XSON8；Low-power triple buffer with open-drain output

PJM3407PSC

Marking：P7；Package：SOT-23-3；P-Channel Power MOSFET

RCLAMP2402B

Marking：P7；Package：SOT-523；Ultra-Low Capacitance TVS for ESD and CDE Protection

74AUP1G74DC

Marking：p74；Package：SOT765-1；Low-power D-type flip-flop with set and reset; positive-edge trigger

1.Generaldescription The74AUP1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D), clock(CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.Dataatthe D-inputthatmeetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi

74AUP1G74GT

Marking：p74；Package：SOT833-1；Low-power D-type flip-flop with set and reset; positive-edge trigger

1.Generaldescription The74AUP1G74isasinglepositiveedgetriggeredD-typeflip-flopwithindividualdata(D), clock(CP),set(SD)andreset(RD)inputs,andcomplementaryQandQoutputs.Dataatthe D-inputthatmeetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransi

74AUP1G79GV

Marking：p79；Package：SOT753；Low-power D-type flip-flop; positive-edge trigger

1.Generaldescription The74AUP1G79isasinglepositive-edgetriggeredD-typeflip-flop.DataattheD-inputthat meetstheset-upandholdtimerequirementsontheLOW-to-HIGHclocktransitionwillbestored intheflip-flopandappearattheQoutput..Schmitt-triggeractionatallinputsm