NB7L572中文资料输入 Mux - 4:1 差分，2.5 V / 3.3 V，时钟/数据扇出缓冲器 - 1:2 LVPECL数据手册ONSEMI规格书

描述 Description

The NB7L572 is a high performance differential 4:1 Clock/Data input multiplexer and a 1:2 LVPECL Clock/Data fanout buffer. The INx/INxb inputs include internal 50-ohm termination resistors and will accept differential LVPECL, CML or LVDS logic levels. The NB7L572 incorporates a pair of Select pins that will choose one of four differential inputs and will produce two identical LVPECL output copies of Clock or Data operating up to 7GHz or 10Gb/s, respectively. As such, NB7L572 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The NB7L572 INx/INxb inputs, outputs and core logic are powered by a 2.5 V +/-5% or 3.3V +/-10% power supply. The two differential LVPECL outputs will swing 750mV when externally terminated with a 50-ohm resistor to VCC - 2V, and are optimized for low skew and minimal jitter. The NB7L572 is offered in a low profile 5mm x5mm 32-pin QFN Pb-free package. Application notes, models, and support documentation are available at www.onsemi.com. The NB7L572 is a member of the GigaComm family of high performance clock products.

特性 Features

• Input Data Rate > 11 Gb/s Typical
• Data Dependent Jitter
• Maximum Input Clock Frequency > 8 GHz Typical
• Random Clock Jitter
• Low Skew 1:2 LVPECL Outputs,
• 4:1 MultiLevel Mux Inputs, Accepts LVPECL, CML LVDS
• 150 ps Typical Propagation Delay
• Differential LVPECL Outputs, 750 mV Peak-to-Peak, Typical
• Operating Range: VCC = 2.375 V to 3.6 V
• Internal 50-ohm Input Termination Resistors
• VREFAC Reference Output
• 40C to +85C Ambient Operating Temperature

应用 Application

• Redundant Clock / Data distribution
• SONET/SDH/Fibre Channel/Gigabit Ethernet Clock / Data distribution
• Servers and Routers

简介

NB7L572属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的NB7L572时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。