MPC8544E PowerQUICC III Integrated Processor Hardware Specifications

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PowerQUICC, 32 Bit Power Arch SoC, 800MHz, DDR1/2, PCI/PCIe, 1GbE, USB, SEC, -40 to105C, Rev 2.1

The MPC8544E PowerQUICC® III is designed to offer the unique combination of high performance, exceptional integration and lower overall power consumption required for networking, communications and industrial control applications.\nThe MPC8544E includes a high-performance e500 processor core built o • Embedded e500 core, initial offerings from 667 MHz up to 1.067 GHz • Dual dispatch superscalar, 7-stage pipeline design with out-of-order issue and execution\n• 2,240 MIPS at 1.0 GHz (estimated Dhrystone 2.1)\n• 36-bit physical addressing\n• Integrated L1/L2 cache • L1 cache—32 KB data and 32 KB i;

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PowerQUICC, 32 Bit Power Arch SoC, 1000MHz, DDR1/2, PCI/PCIe, 1GbE, USB, SEC, -40 to105C, Rev 2.1

The MPC8544E PowerQUICC® III is designed to offer the unique combination of high performance, exceptional integration and lower overall power consumption required for networking, communications and industrial control applications.\nThe MPC8544E includes a high-performance e500 processor core built o • Embedded e500 core, initial offerings from 667 MHz up to 1.067 GHz • Dual dispatch superscalar, 7-stage pipeline design with out-of-order issue and execution\n• 36-bit physical addressing\n• L1 cache—32 KB data and 32 KB instruction cache with line-locking support\n• L1 and L2 hardware coherency\n;

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IC MPU MPC85XX 667MHZ 783FCBGA

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