MMS-103-01-L-DV规格书库存现货美国申泰-114ic电子网

型号	下载订购	功能描述	制造商上传企业	LOGO
MMS-103-01-L-DV	文件：300 bytes Page：1 Pages	排母	Samtec 美国申泰	Samtec
PLL103-01	文件：69.7 Kbytes Page：7 Pages	Low Skew Buffers FEATURES • Generate 18 copies of High-speed clock inputs. • Supports up to four SDRAM DIMMS synchronous clocks. • Supports 2-wire I2C serial bus interface with readback. • 50 duty cycle with low jitter. • Less than 5ns delay. • Skew between any outputs is less than 250 ps. • Tri-state pin f 文件：69.7 Kbytes 页数：7 Pages	PLL	PLL
PLL103-01XC	文件：69.7 Kbytes Page：7 Pages	Low Skew Buffers FEATURES • Generate 18 copies of High-speed clock inputs. • Supports up to four SDRAM DIMMS synchronous clocks. • Supports 2-wire I2C serial bus interface with readback. • 50 duty cycle with low jitter. • Less than 5ns delay. • Skew between any outputs is less than 250 ps. • Tri-state pin f 文件：69.7 Kbytes 页数：7 Pages	PLL	PLL
PLL103-01XI	文件：69.7 Kbytes Page：7 Pages	Low Skew Buffers FEATURES • Generate 18 copies of High-speed clock inputs. • Supports up to four SDRAM DIMMS synchronous clocks. • Supports 2-wire I2C serial bus interface with readback. • 50 duty cycle with low jitter. • Less than 5ns delay. • Skew between any outputs is less than 250 ps. • Tri-state pin f 文件：69.7 Kbytes 页数：7 Pages	PLL	PLL

更多MMS-103-01-L-DV供应商更新时间2025-12-23 15:01:00