Quad 2-Input NAND Gate (Open Drain)

文件：113.57 Kbytes 页数：4 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Quad 2-Input NAND Gate (Open Drain)

文件：113.57 Kbytes 页数：4 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Quad 2-Input NAND Gate (Open Drain)

文件：113.57 Kbytes 页数：4 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

文件：55.97 Kbytes 页数：8 Pages

PHI

飞利浦

Quad 2-input NAND gate; open-drain output

1. General description The 74HC03; 74HCT03 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.

文件：226.43 Kbytes 页数：11 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

文件：55.97 Kbytes 页数：8 Pages

PHI

飞利浦