10-to-4 Line Priority Encoder

General Description\nThis priority encoder utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds and output drive similar to LS-TTL. Low quiescent power consumption: 40mW maximum at 25°C\nHigh speed: 13 ns propagation delay (typical)\nVery low input current: 10-5 µA typical;

TI

德州仪器

10-to-4 Line Priority Encoder

文件：105.75 Kbytes 页数：4 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

10-to-4 line priority encoder

GENERAL DESCRIPTION The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Encodes 10-line decimal to 4-line BCD • Useful for 10-position switch encoding • Used in

文件：120.6 Kbytes 页数：23 Pages

PHI

飞利浦

10-TO-4 LINE PRIORITY ENCODER

GENERAL DESCRIPTION The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Encodes 10-line decimal to 4-line BCD • Useful for 10-position switch encoding • Used in

文件：43.55 Kbytes 页数：7 Pages

PHI

飞利浦

10-TO-4 LINE PRIORITY ENCODER

GENERAL DESCRIPTION The 74HC/HCT147 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Encodes 10-line decimal to 4-line BCD • Useful for 10-position switch encoding • Used in

文件：43.55 Kbytes 页数：7 Pages

PHI

飞利浦