首页 >MM74ACT112>规格书列表
| 零件编号 | 下载 订购 | 功能描述/丝印 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
DUALJ-KNEGATIVE-EDGE-TRIGGEREDFLIP-FLOPSWITHCLEARANDPRESET InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays 24-mAOutputDriveCurrent Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,Me | TI2Texas Instruments 德州仪器美国德州仪器公司 | TI2 | ||
Dualj-kFlip-FlopwithSetandReset | TITexas Instruments 德州仪器美国德州仪器公司 | TI | ||
DUALJ-KNEGATIVE-EDGE-TRIGGEREDFLIP-FLOPSWITHCLEARANDPRESET | TITexas Instruments 德州仪器美国德州仪器公司 | TI | ||
DUALJ-KNEGATIVE-EDGE-TRIGGEREDFLIP-FLOPSWITHCLEARANDPRESET | TITexas Instruments 德州仪器美国德州仪器公司 | TI | ||
DUALJ-KNEGATIVE-EDGE-TRIGGEREDFLIP-FLOPSWITHCLEARANDPRESET InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays 24-mAOutputDriveCurrent Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,Me | TI2Texas Instruments 德州仪器美国德州仪器公司 | TI2 | ||
DualJKNegativeEdge-TriggeredFlip-Flop Description TheHD74AC112/HD74ACT112featuresindividualJ,K,ClockandasynchronousSetandClearinputstoeachflipflop. WhentheclockgoesHigh,theinputsareenabledanddatawillbeaccepted.ThelogicleveloftheJandKinputs maychangewhentheclockisHighandthebistablewill | RENESASRenesas Technology Corp 瑞萨瑞萨科技有限公司 | RENESAS | ||
DualJKNegativeEdge-TriggeredFlip-Flop Description TheHD74AC112/HD74ACT112featuresindividualJ,K,ClockandasynchronousSetandClearinputstoeachflip-flop.WhentheclockgoesHigh,theinputsareenabledanddatawillbeaccepted.ThelogicleveloftheJandKinputsmaychangewhentheclockisHighandthebistablewillp | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | ||
DUALJ-KFLIP-FLOPWITHSETANDRESET DUALJ-KFLIP-FLOPWITHSETANDRESET High-SpeedSilicon-GateCMOS TheIN74ACT112isidenticalinpinouttotheLS/ALS112,HC/HCT112.TheIN74ACT112maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. Eachflip-flopisnegative-edgeclockedandhasac | INTEGRAL Integral Corp. | INTEGRAL | ||
DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS DualJ-KFlip-FlopwithSetandReset High-SpeedSilicon-GateCMOS TheIN74ACT112isidenticalinpinouttotheLS/ALS112,HC/HCT112.TheIN74ACT112maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. Eachflip-flopisnegative-edgeclockedandhasac | IKSEMICON IK Semicon Co., Ltd | IKSEMICON | ||
DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS DualJ-KFlip-FlopwithSetandReset High-SpeedSilicon-GateCMOS TheIN74ACT112isidenticalinpinouttotheLS/ALS112,HC/HCT112.TheIN74ACT112maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. Eachflip-flopisnegative-edgeclockedandhasac | IKSEMICON IK Semicon Co., Ltd | IKSEMICON |
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