MM54HC283J数据手册TI中文资料规格书

描述 Description

General Description
This full adder performs the addition of two 4-bit binary numbers utilizing advanced silicon-gate CMOS technology. The sum (R) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. These adders feature full internal look ahead across all four bits. This provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation.
The adder logic, including the carry, is implemented in its true form meaning that the end-around carry can be accomplished without the need for logic or level inversion. All in puts are protected from damage due to static discharge by internal diode clamps to VCC and ground

特性 Features

■ Full-carry look-ahead across the four bits
■ Systems achieve partial look-ahead performance with the economy of ripple carry
■ Wide supply range: 2V to 6V
■ Low quiescent power consumption: 8 μA at 25°C
■ Low input current: 1 μA maximum