MM54HC245A数据手册TI中文资料规格书

描述 Description

General Description
This TRI-STATE bidirectional buffer utilizes advanced silicon-gate CMOS technology, and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capacitances. This circuit possesses the low power consumption and high noise immunity usually associated with CMOS circuitry, yet has speeds comparable to low power Schottky TTL circuits.

特性 Features

Typical propagation delay: 13 ns
Wide power supply range: 2± 6V
Low quiescent current: 80mA maximum (74 HC)
TRI-STATE outputs for connection to bus oriented systems
High output drive: 6 mA (minimum)
Same as the '645