MM54HC194数据手册TI中文资料规格书

描述 Description

Acquired by Texas Instruments on September 23rd, 2011.General Description
This 4-bit high speed bidirectional shift register utilizes advanced silicon-gate CMOS technology to achieve the low power consumption and high noise immunity of standard CMOS integrated circuits, along with the ability to drive 10 LS-TTL loads. This device operates at speeds similar to the equivalent low power Schottky part.
This bidirectional shift register is designed to incorporate virtually all of the features a system designer may want in a shift register. It features parallel inputs, parallel outputs, right shift and left shift serial inputs, operating mode control inputs, and a direct overriding clear line. The register has four distinct modes of operation: PARALLEL (broadside) LOAD; SHIFT RIGHT (in the direction QA toward QD); SHIFT LEFT; INHIBIT CLOCK (do nothing).
Synchronous parallel loading is accomplished by applying the four bits of data and taking both mode control inputs, S0 and S1, high. The data are loaded into their respective flip flops and appear at the outputs after the positive transition of the CLOCK input. During loading, serial data flow is inhibited. Shift right is accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low.

特性 Features

■ Typical operating frequency: 45 MHz
■ Typical propagation delay: ns (clock to Q)
■ Wide operating supply voltage range: 2–6V
■ Low input current: 1 μA maximum
■ Low quiescent supply current: 160 μA maximum (74HC Series)
■ Fanout of 10 LS-TTL loads