丝印：3754SLF；Package：SOIC；LOW COST 54 MHZ 3.3 VOLT VCXO

Features • MK3754D and MK3754B are drop-in upgrades to the earlier MK3754S device • Packaged in 8-pin SOIC • Available in Pb (lead) free package • Operating voltage of 3.3 V • Uses an inexpensive 13.500 MHz external crystal • On-chip VCXO (patented) with pull range of 200 ppm (minimum) •

文件：323.3 Kbytes 页数：8 Pages

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丝印：MK3754S；Package：SOIC；LOW COST 54 MHZ 3.3 VOLT VCXO

Features • MK3754D and MK3754B are drop-in upgrades to the earlier MK3754S device • Packaged in 8-pin SOIC • Available in Pb (lead) free package • Operating voltage of 3.3 V • Uses an inexpensive 13.500 MHz external crystal • On-chip VCXO (patented) with pull range of 200 ppm (minimum) •

文件：323.3 Kbytes 页数：8 Pages

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Low Cost 54 MHz 3.3 Volt VCXO

Description The MK3754 is ICS/Microclock’s lowest cost, low jitter, high performance 3.3 Volt VCXO and PLL clock synthesizer designed to replace expensive 54 MHz VCXOs. The on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3.3 V input voltage to vary the output clocks by ±100 ppm. Usin

文件：59.84 Kbytes 页数：4 Pages

ICST

VCXO AND HDTV SET-TOP CLOCK SOURCE

Features • Packaged in 28-pin SSOP • Pb (lead) free package • HDTV frequencies of 74.25 and 74.175824 MHz • On-chip patented VCXO with pull range of 200 ppm (minimum) • VCXO tuning voltage of 0 to 3.3 V • Supports Ethernet with 20 and 25 MHz clocks • Modem clocks of 11.0592 and 24.576 MHz

文件：389.8 Kbytes 页数：10 Pages

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丝印：MK3771-17RLF；Package：SSOP；VCXO AND HDTV SET-TOP CLOCK SOURCE

Features • Packaged in 28-pin SSOP • Pb (lead) free package • HDTV frequencies of 74.25 and 74.175824 MHz • On-chip patented VCXO with pull range of 200 ppm (minimum) • VCXO tuning voltage of 0 to 3.3 V • Supports Ethernet with 20 and 25 MHz clocks • Modem clocks of 11.0592 and 24.576 MHz

文件：389.8 Kbytes 页数：10 Pages

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丝印：MK3771-17RLF；Package：SSOP；VCXO AND HDTV SET-TOP CLOCK SOURCE

Features • Packaged in 28-pin SSOP • Pb (lead) free package • HDTV frequencies of 74.25 and 74.175824 MHz • On-chip patented VCXO with pull range of 200 ppm (minimum) • VCXO tuning voltage of 0 to 3.3 V • Supports Ethernet with 20 and 25 MHz clocks • Modem clocks of 11.0592 and 24.576 MHz

文件：389.8 Kbytes 页数：10 Pages

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BUFFER/CLOCK DRIVER

Features • Packaged in 20-pin SSOP • Pb (lead) free package • Five outputs for each bank with one clock input • Two separate banks of five outputs each • Advanced, low-power, CMOS process • Ten output clocks • Two separate inputs • Industrial temperature range -40°C to +85°C • Hysteresis

文件：333.25 Kbytes 页数：8 Pages

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丝印：MK3805RILF；Package：SSOP；BUFFER/CLOCK DRIVER

Features • Packaged in 20-pin SSOP • Pb (lead) free package • Five outputs for each bank with one clock input • Two separate banks of five outputs each • Advanced, low-power, CMOS process • Ten output clocks • Two separate inputs • Industrial temperature range -40°C to +85°C • Hysteresis

文件：333.25 Kbytes 页数：8 Pages

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丝印：MK3805RILF；Package：SSOP；BUFFER/CLOCK DRIVER

Features • Packaged in 20-pin SSOP • Pb (lead) free package • Five outputs for each bank with one clock input • Two separate banks of five outputs each • Advanced, low-power, CMOS process • Ten output clocks • Two separate inputs • Industrial temperature range -40°C to +85°C • Hysteresis

文件：333.25 Kbytes 页数：8 Pages

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BUFFER/CLOCK DRIVER

Features • Packaged in 20-pin SSOP • Pb (lead) free package • 1 to 10 fanout buffer • Maximum skew between outputs of same package 0.35 ns • Maximum skew between outputs of different packages 0.75 ns • Max propagation delay of 3.8 ns • Operating voltage of 3.3 V • Advanced, low power, CMOS

文件：317.26 Kbytes 页数：8 Pages

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