Dual D Flip-Flop with Set and Reset

文件：103.38 Kbytes 页数：5 Pages

ONSEMI

安森美半导体

Dual D Flip?묯lop with Set and Reset with LSTTL Compatible Inputs

文件：134.92 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Dual D Flip-Flop with Set and Reset

文件：103.38 Kbytes 页数：5 Pages

ONSEMI

安森美半导体

Dual D Flip?묯lop with Set and Reset with LSTTL Compatible Inputs

文件：134.92 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Dual D Flip?묯lop with Set and Reset with LSTTL Compatible Inputs

文件：134.92 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Dual D Flip?묯lop with Set and Reset with LSTTL Compatible Inputs

文件：134.92 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Dual D Flip-Flop with Set and Reset

文件：103.38 Kbytes 页数：5 Pages

ONSEMI

安森美半导体

Dual D Flip?묯lop with Set and Reset with LSTTL Compatible Inputs

文件：134.92 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

Dual D Flip?묯lop with Set and Reset with LSTTL Compatible Inputs

文件：134.92 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

双 D 型触发器，带设置和重置

High-Performance Silicon-Gate CMOS The MC74HCT74A is identical in pinout to the LS74. This device may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.This device consists of two D flip-flops with individual Set, Reset, and Clock inputs. Information at a D-i • Output Drive Capability: 10 LSTTL Loads\n• TTL NMOS Compatible Input Levels\n• Outputs Directly Interface to CMOS, NMOS, and TTL\n• Operating Voltage Range: 4.5 to 5.5 V\n• Low Input Current: 1.0 mA\n• In Compliance with the Requirements Defined by JEDEC Standard No. 7A\n• Chip Complexity: 136 FET;

ONSEMI

安森美半导体