Octal 3?뭆tate Noninverting Transparent Latch High?뭁erformance Silicon?묰ate CMOS

文件：118.52 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Octal 3?뭆tate Noninverting Transparent Latch High?뭁erformance Silicon?묰ate CMOS

文件：118.52 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Octal 3-State Noninverting Transparent Latch

文件：121.56 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

Octal 3?뭆tate Noninverting Transparent Latch High?뭁erformance Silicon?묰ate CMOS

文件：118.52 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Octal 3?뭆tate Noninverting Transparent Latch High?뭁erformance Silicon?묰ate CMOS

文件：118.52 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Octal 3?뭆tate Noninverting Transparent Latch High?뭁erformance Silicon?묰ate CMOS

文件：118.52 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Octal 3?뭆tate Noninverting Transparent Latch High?뭁erformance Silicon?묰ate CMOS

文件：118.52 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Octal 3-State Noninverting Transparent Latch

Octal 3-State Noninverting Transparent Latch\nHigh–Performance Silicon–Gate CMOSThe MC54/74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.\nThese latches appear transparent to data (i.e.

恩XP

恩智浦

Octal 3-State Non-inverting Transparent Latch

High-Performance Silicon-Gate CMOSThe MC74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Ena • Output Drive Capability: 15 LSTTL Loads\n• Outputs Directly Interface to CMOS, NMOS and TTL\n• Operating Voltage Range: 2.0 to 6.0 V\n• Low Input Current: 1.0 mA\n• In Compliance with the Requirements Defined by JEDEC Standard No. 7A\n• Chip Complexity: 218 FETs or 54.5 Equivalent Gates\n• Pb-Free;

ONSEMI

安森美半导体

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 锁存器 描述：IC LATCH TRANSP OCTAL 20-TSSOP

ONSEMI

安森美半导体