Quad 3-State Noninverting Buffers

Quad 3−State Noninverting Buffers High−Performance Silicon−Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A n

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Quad 3-State Noninverting Buffers

The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3–state memory address

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Quad 3-State Noninverting Buffers

The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3–state memory address

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Motorola

摩托罗拉

Quad 3-State Noninverting Buffers

Quad 3−State Noninverting Buffers High−Performance Silicon−Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A n

文件：148.04 Kbytes 页数：8 Pages

ONSEMI

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Quad 3-State Noninverting Buffers

文件：113.41 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

Quad 3-State Noninverting Buffers

文件：113.41 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

Quad 3-State Noninverting Buffers

文件：113.41 Kbytes 页数：7 Pages

ONSEMI

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四路非反相缓冲器，3 态

High-Performance Silicon-Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.The HC125A and HC126A noninverting buffers are designed to be us • Output Drive Capability: 15 LSTTL Loads\n• Outputs Directly Interface to CMOS, NMOS, and TTL\n• Operating Voltage Range: 2.0 to 6.0 V\n• Low Input Current: 1.0 mA\n• High Noise Immunity Characteristic of CMOS Devices\n• In Compliance with the Requirements Defined by JEDEC Standard No. 7A\n• Chip C;

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Package：14-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUFFER NON-INVERT 6V 14SOIC

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安森美半导体

Package：14-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUFFER NON-INVERT 6V 14SOIC

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安森美半导体