Quad 2?묲nput NAND Gate with Open?묭rain Outputs High?뭁erformance Silicon?묰ate CMOS

文件：147.89 Kbytes 页数：9 Pages

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Quad 2?묲nput NAND Gate with Open?묭rain Outputs High?뭁erformance Silicon?묰ate CMOS

文件：147.89 Kbytes 页数：9 Pages

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Quad 2-Input NAND Gate with Open-Drain Outputs

文件：133.96 Kbytes 页数：8 Pages

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Quad 2?묲nput NAND Gate with Open?묭rain Outputs High?뭁erformance Silicon?묰ate CMOS

文件：147.89 Kbytes 页数：9 Pages

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安森美半导体

Quad 2?묲nput NAND Gate with Open?묭rain Outputs High?뭁erformance Silicon?묰ate CMOS

文件：147.89 Kbytes 页数：9 Pages

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QUAD 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUTS

文件：154.75 Kbytes 页数：8 Pages

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Quad 2?묲nput NAND Gate with Open?묭rain Outputs High?뭁erformance Silicon?묰ate CMOS

文件：147.89 Kbytes 页数：9 Pages

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Quad 2?묲nput NAND Gate with Open?묭rain Outputs High?뭁erformance Silicon?묰ate CMOS

文件：147.89 Kbytes 页数：9 Pages

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四 2 输入 NAND 门极，带开漏输出

High-Performance Silicon-Gate CMOS The MC74HC03A is identical in pinout to the LS03. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC03A NAND gate has, as its outputs, a high-performance MOS N-Channel transistor. This • Output Drive Capability: 10 LSTTL Loads With Suitable Pullup Resistor\n• Outputs Directly Interface to CMOS, NMOS and TTL\n• High Noise Immunity Characteristic of CMOS Devices\n• Operating Voltage Range: 2 to 6V\n• Low Input Current: 1mA\n• In Compliance With the JEDEC Standard No. 7A Requirements;

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Package：14-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND OD 4CH 2-INP 14SOIC

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