Dual-Band PLL Frequency Synhesizer with ADC and Frequency Counter

Advance Information Dual-Band PLL Frequency Synthesizer with ADC and Frequency Counter CMOS The MC145173 is a single–chip CMOS synthesizer with a four–wire serial interface for primary use in AM–FM broadcast receivers. The device also finds use in long–wave (LW) and short–wave (SW) rece

文件：280.85 Kbytes 页数：33 Pages

Motorola

摩托罗拉

Dual-Band PLL Frequency Synhesizer with ADC and Frequency Counter

Advance Information Dual-Band PLL Frequency Synthesizer with ADC and Frequency Counter CMOS The MC145173 is a single–chip CMOS synthesizer with a four–wire serial interface for primary use in AM–FM broadcast receivers. The device also finds use in long–wave (LW) and short–wave (SW) rece

文件：280.85 Kbytes 页数：33 Pages

Motorola

摩托罗拉

Dual 64-Bit Static Shift Register

Dual 64-Bit Static Shift Register The MC14517B dual 64–bit static shift register consists of two identical, independent, 64–bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, re

文件：157.56 Kbytes 页数：8 Pages

ONSEMI

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Dual 64-Bit Static Shift Register

Dual 64-Bit Static Shift Register The MC14517B dual 64–bit static shift register consists of two identical, independent, 64–bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, re

文件：157.56 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Dual 64-Bit Static Shift Register

Dual 64-Bit Static Shift Register The MC14517B dual 64–bit static shift register consists of two identical, independent, 64–bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, re

文件：157.56 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Dual 64-Bit Static Shift Register

Dual 64-Bit Static Shift Register The MC14517B dual 64–bit static shift register consists of two identical, independent, 64–bit registers. Each register has separate clock and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data at the data input is entered by clocking, re

文件：157.56 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Phase-Frequency Detector PLL Frequency Synthesizer with Serial Interface

文件：13.43683 Mbytes 页数：26 Pages

LANSDALE

Phase-Frequency Detector PLL Frequency Synthesizer with Serial Interface

文件：13.43683 Mbytes 页数：26 Pages

LANSDALE

Phase-Frequency Detector PLL Frequency Synthesizer with Serial Interface

文件：13.43683 Mbytes 页数：26 Pages

LANSDALE

Dual 64?묪it Static Shift Register

文件：90.67 Kbytes 页数：6 Pages

ONSEMI

安森美半导体