2.5V / 3.3V ECL 1:2 Differential Fanout Buffer

Description The MC10/100LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single−ended CLK input operation is limited to a V

文件：134.24 Kbytes 页数：10 Pages

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2.5V / 3.3V ECL 1:2 Differential Fanout Buffer

文件：166.19 Kbytes 页数：12 Pages

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ECL 1:2 差分时钟/数据扇出缓冲器

The MC10LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single ended CLK input operation is limited to a VCC >= 3.0 V in PECL m • 240 ps Typical Propagation Delay\n• Maximum Frequency > 3 GHz Typical\n• PECL Mode Operating Range: VCC= 2.375 V to 3.8 V with VEE= 0 V\n• NECL Mode Operating Range: VCC= 0 V with VEE= -2.375 V to -3.8 V\n• Open Input Default State\n• Q Outputs will default LOW with inputs open or at VEE\n• LVDS I;

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Low-Voltage 1:10 Differential LVECL/LVPECL/LVEPECL/HSTL Clock Driver

Description The MC100LVEP111 is a low skew 1−to−10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single−ended (if the VBB output is used). HSTL inputs can be used when th

文件：131.96 Kbytes 页数：8 Pages

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Low-Voltage 1:10 Differential LVECL/LVPECL/LVEPECL/HSTL Clock Driver

Description The MC100LVEP111 is a low skew 1−to−10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single−ended (if the VBB output is used). HSTL inputs can be used when th

文件：131.96 Kbytes 页数：8 Pages

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Low-Voltage 1:10 Differential LVECL/LVPECL/LVEPECL/HSTL Clock Driver

Description The MC100LVEP111 is a low skew 1−to−10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single−ended (if the VBB output is used). HSTL inputs can be used when th

文件：131.96 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

2.5V / 3.3V ECL 1:2 Differential Fanout Buffer

Description The MC10/100LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single−ended CLK input operation is limited to a V

文件：134.24 Kbytes 页数：10 Pages

ONSEMI

安森美半导体

2.5V / 3.3V ECL 1:2 Differential Fanout Buffer

Description The MC10/100LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single−ended CLK input operation is limited to a V

文件：134.24 Kbytes 页数：10 Pages

ONSEMI

安森美半导体

2.5V / 3.3V ECL 1:2 Differential Fanout Buffer

Description The MC10/100LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single−ended CLK input operation is limited to a V

文件：134.24 Kbytes 页数：10 Pages

ONSEMI

安森美半导体

2.5V / 3.3V ECL 1:2 Differential Fanout Buffer

Description The MC10/100LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single−ended CLK input operation is limited to a V

文件：134.24 Kbytes 页数：10 Pages

ONSEMI

安森美半导体