Dual LVTTL/LVCMOS to Differential LVPECL Translator

Description The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the low skew, dual gate design of the LVELT22 makes it ideal for applications

文件：57.15 Kbytes 页数：3 Pages

ONSEMI

安森美半导体

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

文件：80.47 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

文件：150.35 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

转换器，双路 LVTTL / LVCMOS 到差分 LVPECL

The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the LVELT22 makes it ideal for applications which requ • 350ps Typical Propagation Delay\n• \n• ESD Protection: >4 KV HBM, >200 V MM\n• Flow Through Pinouts\n• The 100 Series Contains Temperature Compensation\n• LVPECL Operating Range: VCC= 3.15 V to 3.45 V with GND= 0 V\n• When Unused TTL Input is left Open, Q Output will Default High\n• Meets or Excee;

ONSEMI

安森美半导体

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

文件：80.47 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

文件：150.35 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

Evaluation Board Manual for High Frequency SOIC 8

文件：202.47 Kbytes 页数：20 Pages

ONSEMI

安森美半导体

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

文件：80.47 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

文件：80.47 Kbytes 页数：7 Pages

ONSEMI

安森美半导体

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

文件：150.35 Kbytes 页数：7 Pages

ONSEMI

安森美半导体