Low Voltage 1:15 Differential 첨1첨2 ECL/PECL Clock Driver

3.3 V/5.0 VECL 1:15 Differential ÷1/÷2 Clock Driver The MC100LVE222 is a low skew 1:15 differential ÷1/÷2 ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be differential or used single−ended (with VBB output reference bypassed and connected to t

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LOW VOLTAGE 2:8 DIFFERENTIAL FANOUT BUFFER

Description The MC100LVE310 is a low voltage, low skew 2:8 differential ECL fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew. The LVE310 offers two selectable clock inputs to allow for redundant or t

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4-Input OR/NOR

Description The MC100LVEL01 is a 4−input OR/NOR gate. The device is functionally equivalent to the EL01 device and works from a 3.3 V supply. With AC performance similar to the EL01 device, the LVEL01 is ideal for low voltage applications which require the ultimate in AC performance. Features •

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2-Input Differential AND/NAND

Description The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3 V supply voltage. With propagation delays and output transition times equivalent to the EL05, the LVEL05 is ideally suited for those applicati

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Low Voltage 1:2 Differential Fanout Buffer

Description The MC100LVEL11 is a differential 1:2 fanout buffer. The device is functionally similar to the E111 device but with higher performance capabilities. Having within-device skews and output transition times significantly improved over the E111, the LVEL11 is ideally suited for those appl

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Low Impedance Driver

Description The MC100LVEL12 is a low impedance drive buffer. With two pairs of OR/NOR outputs the device is ideally suited for high drive applications such as memory addressing. The device is functionally equivalent to the EL12 device and operates from a 3.3 V power supply. With propagation delay

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Dual 1:3 Fanout Buffer

Description The MC100LVEL13 is a dual, fully differential 1:3 fanout buffer. The Low Output−Output Skew of the device makes it ideal for distributing two different frequency synchronous signals. Features • 500 ps Typical Propagation Delays • 50 ps Output−Output Skews • ESD Protection: >2 kV H

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1:5 Clock Distribution Chip

Description The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and

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1:5 Clock Distribution Chip

Description The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and

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14-Bit, 80 MSPS/105 MSPS A/D Converter

GENERAL DESCRIPTION The AD6645 is a high speed, high performance, monolithic 14-bit analog-to-digital converter (ADC). All necessary functions, including track-and-hold (T/H) and reference, are included on the chip to provide a complete conversion solution. The AD6645 provides CMOS-compatible dig

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