3.3V ECL 1:5 Clock Distribution Chip

文件：127.8 Kbytes 页数：6 Pages

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3.3 V ECL 1:5 Clock Distribution Chip

文件：158.31 Kbytes 页数：7 Pages

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Package：20-SOIC（0.295"，7.50mm 宽）；包装：托盘 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 2:5 1GHZ 20SOIC

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安森美半导体

1:5 Clock Distribution Chip

Description The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and

文件：100.88 Kbytes 页数：4 Pages

ONSEMI

安森美半导体

3.3V ECL 1:5 Clock Distribution Chip

文件：127.8 Kbytes 页数：6 Pages

ONSEMI

安森美半导体

1:5 Clock Distribution Chip

Description The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and

文件：100.88 Kbytes 页数：4 Pages

ONSEMI

安森美半导体