MC100LVEL14DW集成电路（IC）的时钟缓冲器驱动器规格书PDF中文资料

MC100LVEL14DW属于集成电路（IC）的时钟缓冲器驱动器。由安森美半导体公司制造生产的MC100LVEL14DW时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。

Description

The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and pin compatible with the EL14 but is designed to operate in ECL or PECL mode for a voltage supply range of −3.0 V to −3.8 V ( or 3.0 V to 3.8 V).

Features

• 50 ps Output-to-Output Skew

• Synchronous Enable/Disable

• Multiplexed Clock Input

• ESD Protection: Human Body Model >2 kV

• The 100 Series Contains Temperature Compensation

• PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V

• NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −3.8 V

• Internal Input Pulldown Resistors on CLK

• Q Output will Default LOW with Inputs Open or at VEE

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level 1

For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34

• Transistor Count = 303 devices

• Pb−Free Packages are Available*