Differential LVECL/ECL to LVTTL Translator

Description The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, −3.3 V to −5.2 V, and ground. The small outline 8−lead package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal. Feature

文件：96.13 Kbytes 页数：8 Pages

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Clock Management Design Using Low Skew and Low Jitter Devices

Why Do We Need Clock Management? Can you imagine the chaos in our world if our clocks or watches were not synchronized to Greenwich Mean Time? How would trains, buses, and airplanes run on schedule? The miniseries Longitude was the story of a man who made a major technological breakthrough by inv

文件：209.34 Kbytes 页数：8 Pages

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??.3V / ??V Differential ECL to 3.3V LVTTL Translator

文件：138.94 Kbytes 页数：9 Pages

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转换器，差分 LVECL / ECL 至 LVTTL

The MC100EPT25 is a Differential LVECL/ECL to LVTTL translator. This device requires +3.3V, -3.3V to -5.2V, and ground. The small outline 8-lead SOIC package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.The VBB output allows • 1.1ns Typical Propagation Delay\n• Maximum Frequency > 275 MHz Typical\n• Operating Range: VCC = 3.0 V to 3.6 V; VEE = -5.5 V to -3.0 V; GND = 0 V\n• 24mA TTL outputs\n• Q Output will default LOW with inputs open or at GND\n• VBB Output\n• Open Input Default State\n• Safety Clamp on Inputs\n• Pb-F;

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Differential LVECL/ECL to LVTTL Translator

Description The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, −3.3 V to −5.2 V, and ground. The small outline 8−lead package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal. Feature

文件：96.13 Kbytes 页数：8 Pages

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安森美半导体

Differential LVECL/ECL to LVTTL Translator

Description The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, −3.3 V to −5.2 V, and ground. The small outline 8−lead package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal. Feature

文件：96.13 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Differential LVECL/ECL to LVTTL Translator

Description The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, −3.3 V to −5.2 V, and ground. The small outline 8−lead package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal. Feature

文件：96.13 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Differential LVECL/ECL to LVTTL Translator

Description The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, −3.3 V to −5.2 V, and ground. The small outline 8−lead package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal. Feature

文件：96.13 Kbytes 页数：8 Pages

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安森美半导体

??.3V / ??V Differential ECL to 3.3V LVTTL Translator

文件：138.94 Kbytes 页数：9 Pages

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-3.3V / -5V Differential ECL to 3.3V LVTTL Translator

文件：166.47 Kbytes 页数：8 Pages

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