Dual Differential PECL to TTL Translator

The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data s

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5 V Dual Differential PECL to TTL Translator

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Dual Differential PECL to TTL Translator

The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data

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Translator, Dual Differential PECL to TTL

The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data sig • 3.5ns Typical Propagation Delay\n• 24mA TTL Outputs\n• Flow Through Pinouts\n• ESD Protection: > 2 KV HBM, > 400 V MM\n• The 100 Series Contains Temperature Compensation\n• Operating Range VCC= 4.75 V to 5.25 V with GND= 0 V\n• Internal Input Pulldown Resistors\n• Meets or Exceeds JEDEC Spec EIA/J;

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5 V Dual Differential PECL to TTL Translator

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5 V Dual Differential PECL to TTL Translator

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5 V Dual Differential PECL to TTL Translator

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Evaluation Board Manual for High Frequency SOIC 8

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5 V Dual Differential PECL to TTL Translator

文件：134.05 Kbytes 页数：8 Pages

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安森美半导体

5 V Dual Differential PECL to TTL Translator

文件：81.38 Kbytes 页数：6 Pages

ONSEMI

安森美半导体