MBM29PL160BD中文资料16M (2M × 8/1M × 16) BIT数据手册Fujitsu规格书

描述 Description

■ GENERAL DESCRIPTION
The MBM29PL160TD/BD is a 16M-bit, 3.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each. The MBM29PL160TD/BD is offered in a 48-pin TSOP (I), and 44-pin SOP packages. The device is designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The device can also be reprogrammed in standard EPROM programmers.■ FEATURES
• Single 3.0 V read, program and erase
   Minimizes system level power requirements
• Compatible with JEDEC-standard commands
   Uses same software commands as E2PROMs
• Compatible with MASK ROM pinouts
   48-pin TSOP (I) (Package suffix: PFTN-Normal Bend Type, PFTR-Reversed Bend Type)
   44-pin SOP (Package suffix: PF)
• Minimum 100,000 program/erase cycles
• High performance
   25 ns maximum page access time (75ns maximum random access time)
• An 8 words page read mode function
• Sector erase architecture
   One 8K word, two 4K words, one 112K word, and seven 128K words sectors in word mode
   One 16K byte, two 8K bytes, one 224K byte, and seven 256K bytes sectors in byte mode
   Any combination of sectors can be concurrently erased. Also supports full chip erase
• Boot Code Sector Architecture
   T = Top sector
   B = Bottom sector
• Embedded EraseTM Algorithms
   Automatically pre-programs and erases the chip or any sector
• Embedded programTM Algorithms
   Automatically programs and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
   Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
   When addresses remain stable, automatically switches themselves to low power mode
• Low VCC write inhibit ≤ 2.5 V
• Erase Suspend/Resume
   Suspends the erase operation to allow a read data and/or program
   in another sector within the same device
• Sector protection
   Hardware method disables any combination of sectors from program or erase operations
• Temporary sector unprotection
   Temporary sector unprotection with the software command
• 5V tolerant (Data, Address, and Control Signals)
• In accordance with CFI (Common Flash Memory Interface)

特性 Features

• Single 3.0 V read, program and erase
   Minimizes system level power requirements
• Compatible with JEDEC-standard commands
   Uses same software commands as E2PROMs
• Compatible with MASK ROM pinouts
   48-pin TSOP (I) (Package suffix: PFTN-Normal Bend Type, PFTR-Reversed Bend Type)
   44-pin SOP (Package suffix: PF)
• Minimum 100,000 program/erase cycles
• High performance
   25 ns maximum page access time (75ns maximum random access time)
• An 8 words page read mode function
• Sector erase architecture
   One 8K word, two 4K words, one 112K word, and seven 128K words sectors in word mode
   One 16K byte, two 8K bytes, one 224K byte, and seven 256K bytes sectors in byte mode
   Any combination of sectors can be concurrently erased. Also supports full chip erase
• Boot Code Sector Architecture
   T = Top sector
   B = Bottom sector
• Embedded EraseTM Algorithms
   Automatically pre-programs and erases the chip or any sector
• Embedded programTM Algorithms
   Automatically programs and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
   Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
   When addresses remain stable, automatically switches themselves to low power mode
• Low VCC write inhibit ≤ 2.5 V
• Erase Suspend/Resume
   Suspends the erase operation to allow a read data and/or program
   in another sector within the same device
• Sector protection
   Hardware method disables any combination of sectors from program or erase operations
• Temporary sector unprotection
   Temporary sector unprotection with the software command
• 5V tolerant (Data, Address, and Control Signals)
• In accordance with CFI (Common Flash Memory Interface)