14-Bit, 65Msps, 3.3V ADC

General Description The MAX12553 is a 3.3V, 14-bit, 65Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single-ended or differential signals. The MAX12553 is o

文件：1.44594 Mbytes 页数：28 Pages

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14-Bit, 95Msps, 3.3V ADC

General Description The MAX12555 is a 3.3V, 14-bit, 95Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single-ended or differential signals. The MAX12555 is o

文件：762.14 Kbytes 页数：28 Pages

Maxim

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Low-Voltage and Low-Power Operation

文件：432.97 Kbytes 页数：14 Pages

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14位、65Msps、3.3V ADC

MAX12553是一款3.3V、14位、65Msps的模数转换器(ADC)，具有完全差分的宽带采样/保持(T/H)输入放大器，来驱动一个低噪声内部量化器。模拟输入级接收单端或差分信号。MAX12553针对低功耗、小尺寸及高动态性能进行了优化。从基带到175MHz甚至更高输入频率都可以维持卓越的动态性能，这使得MAX12553十分适合中频(IF)采样应用。\nMAX12553采用3.15V至3.60V单电源供电，在输入频率为175MHz并且提供71dB典型信噪比(SNR)时，功耗仅为363mW。除了工作时功耗低，MAX12553还具有功耗为150µW的断电模式，以便在空闲时节约电能。\n灵活的基 • 直接IF采样，频率高达400MHz \n• 卓越的动态性能 \n• fIN = 3MHz/175MHz时，SNR为74.0dB/71dB \n• fIN = 3MHz/175MHz时，SFDR为90.6dBc/80.7dBc \n• 低噪声基底：-76dBFS \n• 3.3V低功耗工作 \n• 337mW (单端时钟模式) \n• 363mW (差分时钟模式) \n• 150µW (断电模式) \n• 完全差分或单端模拟输入 \n• 可调节的满量程模拟输入范围：±0.35V至±1.10V \n• 共模基准 \n• CMOS兼容输出，采用二进制补码或格雷码 \n• 数据有效指示器简化了数字;

ADI

亚德诺

14-Bit, 65Msps, 3.3V ADC

General Description The MAX12553 is a 3.3V, 14-bit, 65Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single-ended or differential signals. The MAX12553 is o

文件：1.44594 Mbytes 页数：28 Pages

Maxim

美信

Low-Voltage and Low-Power Operation

文件：432.97 Kbytes 页数：14 Pages

Maxim

美信

Low-Voltage and Low-Power Operation

文件：432.97 Kbytes 页数：14 Pages

Maxim

美信