32-Kbit serial SPI bus EEPROM - 105 C Operation

Description The M95320-DRE is a 32-Kbit serial EEPROM device operating up to 105 °C. The M95320- DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2. The device is accessed by a simple serial SPI compatible interface running up to 20 MHz. The memory array is based on

文件：748.59 Kbytes 页数：41 Pages

STMICROELECTRONICS

意法半导体

32 Kbit串行SPI总线EEPROM，具有高速时钟，工作温度105°C

The M95320-DRE is a 32-Kbit serial EEPROM device operating up to 105 °C. The M95320-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.\n\n The device is accessed by a simple serial SPI compatible interface running up to 20 MHz.\n\n The memory array is based on advanced t • Compatible with the Serial Peripheral Interface (SPI) bus \n• Memory array \n •32 Kbit (4 Kbytes) of EEPROM \n •Page size: 32 bytes \n •Write protection by block: 1/4, 1/2 or whole memory \n •Additional Write lockable Page (Identification page) \n• Extended temperature and voltage range \n •Up to ;

ST

意法半导体

64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock

SUMMARY DESCRIPTION These electrically erasable programmable memory (EEPROM) devices are accessed by a high speed SPI-compatible bus. The memory array is organized as 8192 x 8 bit (M95640), and 4096 x 8 bit (M95320). FEATURES SUMMARY ■ Compatible with SPI Bus Serial Interface (Positive Clock SP

文件：164.94 Kbytes 页数：19 Pages

STMICROELECTRONICS

意法半导体

32Kbit and 64Kbit Serial SPI Bus EEPROMs With High Speed Clock

FEATURES SUMMARY ■ Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes) ■ Single Supply Voltage: – 4.5 to 5.5V for M95320 and M95640 – 2.5 to 5.5V for M95320-W and M95320-W – 1.8 to 5.5V for M95320-R and M95640-R – 1.65 to 5.5V for M95320-S and M95640-S ■ 20MHz,

文件：768.47 Kbytes 页数：42 Pages

STMICROELECTRONICS

意法半导体

32 Kbit and 64 Kbit Serial SPI bus EEPROMs with high speed clock

SUMMARY DESCRIPTION These electrically erasable programmable memory (EEPROM) devices are accessed by a high speed SPI-compatible bus. The memory array is organized as 8192 x 8 bit (M95640), and 4096 x 8 bit (M95320). FEATURES SUMMARY ■ Compatible with SPI Bus Serial Interface (Positive Clock SP

文件：353.64 Kbytes 页数：44 Pages

STMICROELECTRONICS

意法半导体