M95256-DRE

256 Kbit串行SPI总线EEPROM，具有高速时钟，工作温度105°C; • Compatible with the Serial Peripheral Interface (SPI) bus \n• Memory array \n •256 Kbit (32 Kbytes) of EEPROM \n •Page size: 64 bytes \n •Write protection by block: 1/4, 1/2 or whole memory \n •Additional Write lockable Page (Identification page) \n• Extended temperature and voltage range \n •Up to 105 °C (VCCfrom 1.7 V to 5.5 V) \n• High speed clock frequency \n •20 MHz for VCC ≥4.5 V \n •10 MHz for VCC ≥2.5 V \n •5 MHz for VCC≥ 1.7 V \n• Schmitt trigger inputs for noise filtering \n• Short Write cycle time \n •Byte Write within 4 ms \n •Page Write within 4 ms \n• Write cycle endurance \n •4 million Write cycles at 25°C \n •1.2 million Write cycles at 85°C \n •900 k Write cycles at 105°C \n• Data retention \n •more than 50 years at105 °C \n •200 years at 55°C \n• ESD Protection (Human Body Model) \n •4000 V \n• Packages \n •RoHS-compliant and halogen-free (ECOPACK2®);

The M95256-DRE is a 256-Kbit serial EEPROM device operating up to 105 °C. The M95256-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.\n\n The device is accessed by a simple serial SPI compatible interface running up to 20 MHz.\n\n The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95256-DRE is a byte-alterable memory (32768 × 8 bits) organized as 512 pages of 64 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.\n\n The M95256-DRE offers an additional Identification Page (64 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.\n\n

M95256-DRE

256-Kbit serial SPI bus EEPROM - 105 C Operation

M95256-R

256KbitserialSPIbusEEPROMwithhigh-speedclock

M95256-R

256KbitserialSPIbusEEPROMwithhigh-speedclock

Description TheM95256,M95256-W,M95256-RandM95256-DRareelectricallyerasableprogrammablememory(EEPROM)devices.TheyareaccessedbyahighspeedSPIcompatiblebus.Theirmemoryarrayisorganizedas32768×8bits.TheM95256-DRalsooffersanadditionalpage,namedtheIdentification

M95256-R

256-KbitserialSPIbusEEPROMwithhigh-speedclock

Features •Compatiblewiththeserialperipheralinterface(SPI)bus •Memoryarray –256-Kbit(32Kbytes)ofEEPROM –Pagesize:64bytes –Additionalwritelockablepage(Identificationpage) •Writetime –ByteWritewithin5ms –PageWritewithin5ms •Writeprotect –quarterarray

M95256-W

256-KbitserialSPIbusEEPROMwithhigh-speedclock

Features •Compatiblewiththeserialperipheralinterface(SPI)bus •Memoryarray –256-Kbit(32Kbytes)ofEEPROM –Pagesize:64bytes –Additionalwritelockablepage(Identificationpage) •Writetime –ByteWritewithin5ms –PageWritewithin5ms •Writeprotect –quarterarray

M95256-W

256KbitserialSPIbusEEPROMwithhigh-speedclock

Description TheM95256,M95256-W,M95256-RandM95256-DRareelectricallyerasableprogrammablememory(EEPROM)devices.TheyareaccessedbyahighspeedSPIcompatiblebus.Theirmemoryarrayisorganizedas32768×8bits.TheM95256-DRalsooffersanadditionalpage,namedtheIdentification

M95256-W

256KbitserialSPIbusEEPROMwithhigh-speedclock