8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

文件：575.34 Kbytes 页数：12 Pages

STMICROELECTRONICS

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8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

文件：270.2 Kbytes 页数：12 Pages

STMICROELECTRONICS

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8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

文件：482.58 Kbytes 页数：17 Pages

STMICROELECTRONICS

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8位SIPO移位寄存器锁存器（3态）

The M74HC4094 device is a high speed CMOS 8-bit SIPO shift latch register fabricated with silicon gate C2MOS technology. It consists of an 8-bit shift register and an 8-bit latch with 3-state output buffer. Data is shifted serially through the shift register on the positive going transition of the c • High speed: fMAX= 80 MHz (typ.) at VCC= 6 V \n• Low power dissipation: ICC= 4 μA (max.) at TA= 25 °C \n• High noise immunity: VNIH= VNIL= 28% VCC(min.) \n• Symmetrical output impedance: |IOH| = IOL= 4 mA (min.) \n• Balanced propagation delays: tPLH≅ tPHL \n• Wide operating voltage range: VCC(o;

ST

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8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

文件：482.58 Kbytes 页数：17 Pages

STMICROELECTRONICS

意法半导体

8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

文件：575.34 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

文件：270.2 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

文件：270.2 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

文件：270.2 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

文件：575.34 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体