DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54/74HC109 is a high speed CMOS DUAL JK FLIP-FLOP WITH PRESET AND CLEAR fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 63 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 2

文件：249.56 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：187.76 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

ST

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54/74HC109 is a high speed CMOS DUAL JK FLIP-FLOP WITH PRESET AND CLEAR fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 63 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 2

文件：249.56 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54/74HC109 is a high speed CMOS DUAL JK FLIP-FLOP WITH PRESET AND CLEAR fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 63 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 2

文件：249.56 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54/74HC109 is a high speed CMOS DUAL JK FLIP-FLOP WITH PRESET AND CLEAR fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 63 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 2

文件：249.56 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：187.76 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：187.76 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：187.76 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：187.76 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体