QUAD BUS BUFFER (3-STATE)

DESCRIPTION The M54/74HC125/126 are high speed CMOS QUAD BUS BUFFER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology. ■ HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT 25 °C ■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS ■ BALANCED PRO

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STMICROELECTRONICS

意法半导体

丝印：HC126；Package：TSSOP14；Quad bus buffer (3-state)

Features • High-speed: tPD = 8 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA = 25 °C • High noise immunity: VNIH = VNIL = 28 % VCC (min) • Symmetrical output impedance: |IOH| = IOL = 6 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

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STMICROELECTRONICS

意法半导体

Package：14-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUFFER NON-INVERT 6V 14TSSOP

STMICROELECTRONICS

意法半导体

Quad bus buffer (3-state)

Features • High-speed: tPD = 8 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA = 25 °C • High noise immunity: VNIH = VNIL = 28 % VCC (min) • Symmetrical output impedance: |IOH| = IOL = 6 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

文件：510.65 Kbytes 页数：14 Pages

STMICROELECTRONICS

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Quad 3-State Noninverting Buffers

The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3–state memory address

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Motorola

摩托罗拉

Quad 3-State Noninverting Buffers

Quad 3−State Noninverting Buffers High−Performance Silicon−Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A n

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ONSEMI

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