丝印：LS240；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS240；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS240；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS240；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS240；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS241；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS241；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS241；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80212 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS241；Package：SOIC；SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

文件：1.80265 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LS243；Package：SOIC；QUADRUPLE BUS TRANSCEIVERS

1FEATURES · Two-Way Asynchronous Communication Between Data Buses · PNP Inputs Reduce D-C Loading · Hysteresis (Typically 400 mV) at Inputs Improves Noise Margin DESCRIPTION These four-data-line transceivers are designed for asynchronous two-way communications between data buses. SN74LS2

文件：673.8 Kbytes 页数：18 Pages

TI

德州仪器