CABLE ASSEMBLIES/MOUNTS

文件：1.14787 Mbytes 页数：4 Pages

pulse

丝印：LMK00725；Package：TSSOP；Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer

1FEATURES • Five 3.3V Differential LVPECL Outputs – Additive Jitter: 43 fs RMS (typ) @ 312.5 MHz – Noise Floor (≥1 MHz offset): -158 dBc/Hz (typ) @ 312.5 MHz – Output Frequency: 650 MHz (max) – Output Skew: 35 ps (max) – Part-to-Part Skew: 100 ps (max) – Propagation Delay: 0.37 ns (max)

文件：662.46 Kbytes 页数：25 Pages

TI

德州仪器

丝印：LMK00725；Package：TSSOP；Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer

1FEATURES • Five 3.3V Differential LVPECL Outputs – Additive Jitter: 43 fs RMS (typ) @ 312.5 MHz – Noise Floor (≥1 MHz offset): -158 dBc/Hz (typ) @ 312.5 MHz – Output Frequency: 650 MHz (max) – Output Skew: 35 ps (max) – Part-to-Part Skew: 100 ps (max) – Propagation Delay: 0.37 ns (max)

文件：662.46 Kbytes 页数：25 Pages

TI

德州仪器

丝印：LMK00725；Package：TSSOP；Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer

1FEATURES • Five 3.3V Differential LVPECL Outputs – Additive Jitter: 43 fs RMS (typ) @ 312.5 MHz – Noise Floor (≥1 MHz offset): -158 dBc/Hz (typ) @ 312.5 MHz – Output Frequency: 650 MHz (max) – Output Skew: 35 ps (max) – Part-to-Part Skew: 100 ps (max) – Propagation Delay: 0.37 ns (max)

文件：662.46 Kbytes 页数：25 Pages

TI

德州仪器

丝印：LMK00725；Package：TSSOP；Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer

1FEATURES • Five 3.3V Differential LVPECL Outputs – Additive Jitter: 43 fs RMS (typ) @ 312.5 MHz – Noise Floor (≥1 MHz offset): -158 dBc/Hz (typ) @ 312.5 MHz – Output Frequency: 650 MHz (max) – Output Skew: 35 ps (max) – Part-to-Part Skew: 100 ps (max) – Propagation Delay: 0.37 ns (max)

文件：662.46 Kbytes 页数：25 Pages

TI

德州仪器

丝印：LMK04100；Package：WQFN；LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

1FEATURES 23• Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO • Outputs – LVPECL/2VPECL, L

文件：926.89 Kbytes 页数：56 Pages

TI

德州仪器

丝印：LMK04100；Package：WQFN；LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

1FEATURES 23• Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO • Outputs – LVPECL/2VPECL, L

文件：926.89 Kbytes 页数：56 Pages

TI

德州仪器

丝印：LMK04100；Package：WQFN；LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

1FEATURES 23• Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO • Outputs – LVPECL/2VPECL, L

文件：926.89 Kbytes 页数：56 Pages

TI

德州仪器

丝印：LMK04100；Package：WQFN；LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

1FEATURES 23• Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO • Outputs – LVPECL/2VPECL, L

文件：926.89 Kbytes 页数：56 Pages

TI

德州仪器

丝印：LMK04100；Package：WQFN；LMK04100 Family Clock Jitter Cleaner with Cascaded PLLs

1FEATURES 23• Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO • Outputs – LVPECL/2VPECL, L

文件：926.89 Kbytes 页数：56 Pages

TI

德州仪器