丝印：L2104D；Package：SOIC；LM2104 107-V, 0.5-A, 0.8-A Half-Bridge Driver with 8-V UVLO, Dead Time, and Shutdown Pin

1 Features • Drives two N-channel MOSFETs in half-bridge configuration • 8-V typical undervoltage lockout on GVDD • 107-V absolute maximum voltage on BST • –19.5-V absolute maximum negative transient voltage handling on SH • 0.5-A/0.8-A peak source/sink currents • 475-ns typical fixed inte

文件：1.13851 Mbytes 页数：28 Pages

TI

德州仪器

丝印：L2104D；Package：SOIC；LM2104 107-V, 0.5-A, 0.8-A Half-Bridge Driver with 8-V UVLO, Dead Time, and Shutdown Pin

1 Features • Drives two N-channel MOSFETs in half-bridge configuration • 8-V typical undervoltage lockout on GVDD • 107-V absolute maximum voltage on BST • –19.5-V absolute maximum negative transient voltage handling on SH • 0.5-A/0.8-A peak source/sink currents • 475-ns typical fixed inte

文件：1.10613 Mbytes 页数：28 Pages

TI

德州仪器

丝印：L2104D；Package：SOIC；LM2104 107-V, 0.5-A, 0.8-A Half-Bridge Driver with 8-V UVLO, Dead Time, and Shutdown Pin

1 Features • Drives two N-channel MOSFETs in half-bridge configuration • 8-V typical undervoltage lockout on GVDD • 107-V absolute maximum voltage on BST • –19.5-V absolute maximum negative transient voltage handling on SH • 0.5-A/0.8-A peak source/sink currents • 475-ns typical fixed inte

文件：1.10613 Mbytes 页数：28 Pages

TI

德州仪器

256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms

The MPC2104/5/6/7 are designed to provide burstable, high performance L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. These products utilize synchronous or asynchr

文件：228.15 Kbytes 页数：24 Pages

MOTOROLA

摩托罗拉

256KB/512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms

The MPC2104P (256KB) and MPC2105P (512KB) are designed to provide burstable, high performance L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. All of these cache m

文件：158.43 Kbytes 页数：16 Pages

MOTOROLA

摩托罗拉

P-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：455.81 Kbytes 页数：4 Pages

SUTEX