P-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：455.81 Kbytes 页数：4 Pages

SUTEX

P-Channel Enhancement Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：579.68 Kbytes 页数：6 Pages

SUTEX

P-Channel Enhancement Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：579.68 Kbytes 页数：6 Pages

SUTEX

MOSFET, P-Channel Enhancement-Mode, -40V, 6.0 Ohm

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature High input impedance and high gain \nLow power drive requirement \nEase of paralleling \nLow CISS and fast switching speeds \nExcellent thermal stability \nIntegral source-drain diode \nFree from secondary breakdown;

Microchip

微芯科技

P-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：455.81 Kbytes 页数：4 Pages

SUTEX

P-Channel Enhancement Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：579.68 Kbytes 页数：6 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：455.81 Kbytes 页数：4 Pages

SUTEX

P-Channel Enhancement Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：579.68 Kbytes 页数：6 Pages

SUTEX

P-Channel Enhancement Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：579.68 Kbytes 页数：6 Pages

SUTEX

P-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

文件：455.81 Kbytes 页数：4 Pages

SUTEX