Sample-and-hold amplifiers

DESCRIPTION The LF198/LF298/LF398 are monolithic sample-and-hold circuits which utilize high-voltage ion-implant JFET technology to obtain ultra-high DC accuracy with fast acquisition of signal and low droop rate. Operating as a unity gain follower, DC gain accuracy is 0.002 typical and acquisiti

文件：129.16 Kbytes 页数：5 Pages

PHI

PHI

MONOLITHIC SAMPLE AND HOLD CIRCUITS

GENERAL DESCRIPTION The LF198/LF298/LF398 are BI-FET monolithic sample and hold circuits with ultra-high DC accuracy, fast acquisition time (6μ to 0.01) and low droop rate. A bipolar input stage is used to obtain the lowest possible offset voltage and wide bandwidth.

文件：257.2 Kbytes 页数：7 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

Monolithic Sample-and-Hold Circuits

Features n Operates from ±5V to ±18V supplies n Less than 10 μs acquisition time n TTL, PMOS, CMOS compatible logic input n 0.5 mV typical hold step at Ch = 0.01 μF n Low input offset n 0.002% gain accuracy n Low output noise in hold mode n Input characteristics do not change during ho

文件：546.15 Kbytes 页数：13 Pages

SYC

Precision Sample and Hold Amplifier

文件：1.07393 Mbytes 页数：16 Pages

LINER

凌力尔特

Monolithic Sample-and-Hold Circuits

文件：520.789 Kbytes 页数：13 Pages

NSC

国半

LF198/LF298/LF398, LF198A/LF398A Monolithic Sample-and-Hold Circuits

文件：564.8 Kbytes 页数：15 Pages

TI

德州仪器

Precision Sample and Hold Amplifier

ADI

亚德诺

LFx98x Monolithic Sample-and-Hold Circuits

1 Features 1• Operates from ±5-V to ±18-V Supplies • Less than 10-μs Acquisition Time • Logic Input Compatible With TTL, PMOS, CMOS • 0.5-mV Typical Hold Step at Ch = 0.01 μF • Low Input Offset • 0.002% Gain Accuracy • Low Output Noise in Hold Mode • Input Characteristics Do Not Change

文件：3.23114 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LF398AN；Package：PDIP(P)；LFx98x Monolithic Sample-and-Hold Circuits

1 Features 1• Operates from ±5-V to ±18-V Supplies • Less than 10-μs Acquisition Time • Logic Input Compatible With TTL, PMOS, CMOS • 0.5-mV Typical Hold Step at Ch = 0.01 μF • Low Input Offset • 0.002% Gain Accuracy • Low Output Noise in Hold Mode • Input Characteristics Do Not Change

文件：3.23114 Mbytes 页数：41 Pages

TI

德州仪器

丝印：LF398AN；Package：PDIP(P)；LFx98x Monolithic Sample-and-Hold Circuits

1 Features 1• Operates from ±5-V to ±18-V Supplies • Less than 10-μs Acquisition Time • Logic Input Compatible With TTL, PMOS, CMOS • 0.5-mV Typical Hold Step at Ch = 0.01 μF • Low Input Offset • 0.002% Gain Accuracy • Low Output Noise in Hold Mode • Input Characteristics Do Not Change

文件：3.23114 Mbytes 页数：41 Pages

TI

德州仪器