Tip & Ring Tin/Lead Termination ?쏝??Multilayer Ceramic Chip Capacitors

文件：55.63 Kbytes 页数：2 Pages

AVX

Tip & Ring Tin/Lead Termination ?쏝??Multilayer Ceramic Chip Capacitors

文件：55.63 Kbytes 页数：2 Pages

AVX

Tip & Ring Tin/Lead Termination ?쏝??Multilayer Ceramic Chip Capacitors

文件：55.63 Kbytes 页数：2 Pages

AVX

丝印：LD1204；Package：VQFN(RGT)；LMK1D120x Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs. • Output frequency up to 2 GHz. • Supply voltage: 1.71 V to 3.465 V • Low additive jitter:

文件：1.39132 Mbytes 页数：35 Pages

TI

德州仪器

丝印：LD1204；Package：VQFN(RGT)；LMK1D120x Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs. • Output frequency up to 2 GHz. • Supply voltage: 1.71 V to 3.465 V • Low additive jitter:

文件：1.39132 Mbytes 页数：35 Pages

TI

德州仪器

丝印：LD1204；Package：VQFN(RGT)；LMK1D120x Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs. • Output frequency up to 2 GHz. • Supply voltage: 1.71 V to 3.465 V • Low additive jitter:

文件：1.39132 Mbytes 页数：35 Pages

TI

德州仪器

丝印：LD1204；Package：VQFN(RGT)；LMK1D120x Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs. • Output frequency up to 2 GHz. • Supply voltage: 1.71 V to 3.465 V • Low additive jitter:

文件：1.39132 Mbytes 页数：35 Pages

TI

德州仪器

丝印：LD1204；Package：VQFN(RGT)；LMK1D120x Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs. • Output frequency up to 2 GHz. • Supply voltage: 1.71 V to 3.465 V • Low additive jitter:

文件：1.39132 Mbytes 页数：35 Pages

TI

德州仪器

丝印：LD1204；Package：VQFN(RGT)；LMK1D120x Low Additive Jitter LVDS Buffer

1 Features • High-performance LVDS clock buffer family with 2 inputs and 4 (2:4) or 8 (2:8) outputs. • Output frequency up to 2 GHz. • Supply voltage: 1.71 V to 3.465 V • Low additive jitter:

文件：1.39132 Mbytes 页数：35 Pages

TI

德州仪器

丝印：LD1204；Package：VQFN；LMK1D120x Low Additive Jitter LVDS Buffer

文件：1.98195 Mbytes 页数：35 Pages

TI

德州仪器