丝印：L1；Package：SC-88A；Single 2-Input NAND Gate

The NL17SZ00 is a single 2−input NAND Gate in tiny footprint packages. Features • Designed for 1.65 V to 5.5 V VCC Operation • 2.4 ns tPD at VCC = 5 V (typ) • Inputs/Outputs Overvoltage Tolerant up to 5.5 V • IOFF Supports Partial Power Down Protection • Source/Sink 24 mA at 3.0 V • Avai

文件：160.68 Kbytes 页数：13 Pages

ONSEMI

安森美半导体

丝印：L1；Package：SC-88A；Single 2-Input NAND Gate

The NL17SZ00 is a single 2−input NAND Gate in tiny footprint packages. Features • Designed for 1.65 V to 5.5 V VCC Operation • 2.4 ns tPD at VCC = 5 V (typ) • Inputs/Outputs Overvoltage Tolerant up to 5.5 V • IOFF Supports Partial Power Down Protection • Source/Sink 24 mA at 3.0 V • Avai

文件：160.68 Kbytes 页数：13 Pages

ONSEMI

安森美半导体

丝印：L1；Package：SOT-553；Single 2-Input NAND Gate

The NL17SZ00 is a single 2−input NAND Gate in tiny footprint packages. Features • Designed for 1.65 V to 5.5 V VCC Operation • 2.4 ns tPD at VCC = 5 V (typ) • Inputs/Outputs Overvoltage Tolerant up to 5.5 V • IOFF Supports Partial Power Down Protection • Source/Sink 24 mA at 3.0 V • Avai

文件：160.68 Kbytes 页数：13 Pages

ONSEMI

安森美半导体

丝印：L1；Package：SOT-553；Single 2-Input NAND Gate

The NL17SZ00 is a single 2−input NAND Gate in tiny footprint packages. Features • Designed for 1.65 V to 5.5 V VCC Operation • 2.4 ns tPD at VCC = 5 V (typ) • Inputs/Outputs Overvoltage Tolerant up to 5.5 V • IOFF Supports Partial Power Down Protection • Source/Sink 24 mA at 3.0 V • Avai

文件：160.68 Kbytes 页数：13 Pages

ONSEMI

安森美半导体

丝印：L1；Package：US8；Dual 2-Input NAND Gate

The NL27WZ00 is a high performance dual 2−input NAND Gate operating from a 1.65 V to 5.5 V supply. Features • Designed for 1.65 V to 5.5 V VCC Operation • 2.4 ns tPD at VCC = 5 V (typ) • Inputs/Outputs Overvoltage Tolerant up to 5.5 V • IOFF Supports Partial Power Down Protection • Source

文件：184.6 Kbytes 页数：12 Pages

ONSEMI

安森美半导体

丝印：L1；Package：US8；Dual 2-Input NAND Gate

The NL27WZ00 is a high performance dual 2−input NAND Gate operating from a 1.65 V to 5.5 V supply. Features • Designed for 1.65 V to 5.5 V VCC Operation • 2.4 ns tPD at VCC = 5 V (typ) • Inputs/Outputs Overvoltage Tolerant up to 5.5 V • IOFF Supports Partial Power Down Protection • Source

文件：184.6 Kbytes 页数：12 Pages

ONSEMI

安森美半导体

丝印：L1；Package：SC-88A；Single 2-Input NAND Gate

The NL17SZ00 is a single 2−input NAND Gate in tiny footprint packages. Features • Designed for 1.65 V to 5.5 V VCC Operation • 2.4 ns tPD at VCC = 5 V (typ) • Inputs/Outputs Overvoltage Tolerant up to 5.5 V • IOFF Supports Partial Power Down Protection • Source/Sink 24 mA at 3.0 V • Avai

文件：160.68 Kbytes 页数：13 Pages

ONSEMI

安森美半导体

丝印：L1；Package：US8；Dual 2-Input NAND Gate

The NL27WZ00 is a high performance dual 2−input NAND Gate operating from a 1.65 V to 5.5 V supply. Features • Designed for 1.65 V to 5.5 V VCC Operation • 2.4 ns tPD at VCC = 5 V (typ) • Inputs/Outputs Overvoltage Tolerant up to 5.5 V • IOFF Supports Partial Power Down Protection • Source

文件：184.6 Kbytes 页数：12 Pages

ONSEMI

安森美半导体

丝印：L1；Package：XSON6；1-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state

1. General description The NXU0101 is a 1-bit, dual-supply level translating buffer with Schmitt-trigger input and 3-state output. It features one data input (A), one data output (YB), and an output enable input (OE). Both VCCA and VCCB can be supplied at any voltage between 0.9 V and 5.5 V

文件：518.2 Kbytes 页数：30 Pages

NEXPERIA

安世

丝印：L1；Package：XSON6；1-bit dual-supply buffer/level translator with Schmitt-trigger; 3-state

1. General description The NXU0101-Q100 is a 1-bit, dual-supply level translating buffer with Schmitt-trigger input and 3-state output. It features one data input (A), one data output (YB), and an output enable input (OE). Both VCCA and VCCB can be supplied at any voltage between 0.9 V and 5

文件：499.5 Kbytes 页数：28 Pages

NEXPERIA

安世