Low Power 12-Bit, 250MSPS ADC

The ISLA112P25MREP is a low-power 12-bit, 250MSPS analog-to-digital converter. Designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process. A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of various parameters

文件：992.77 Kbytes 页数：29 Pages

Intersil

Low Power 12-Bit, 250MSPS ADC

Features • Programmable Gain, Offset and Skew Control • 1.3GHz Analog Input Bandwidth • 60fs Clock Jitter • Over-Range Indicator • Selectable Clock Divider: 1, 2 or 4 • Clock Phase Selection • Nap and Sleep Modes • Two’s Complement, Gray Code or Binary Data Format • SDR/DDR LVDS-Compa

文件：891.04 Kbytes 页数：29 Pages

RENESAS

瑞萨

Low Power 12-Bit, 250MSPS ADC

文件：1.00522 Mbytes 页数：29 Pages

Intersil

丝印：ISLA112P25MREP；Package：QFN；Low Power 12-Bit, 250MSPS ADC

Features • Programmable Gain, Offset and Skew Control • 1.3GHz Analog Input Bandwidth • 60fs Clock Jitter • Over-Range Indicator • Selectable Clock Divider: 1, 2 or 4 • Clock Phase Selection • Nap and Sleep Modes • Two’s Complement, Gray Code or Binary Data Format • SDR/DDR LVDS-Compa

文件：891.04 Kbytes 页数：29 Pages

RENESAS

瑞萨

Low Power 12-Bit, 250MSPS ADC

The ISLA112P25MREP is a low-power 12-bit, 250MSPS analog-to-digital converter. Designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process. A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of various parameters

文件：992.77 Kbytes 页数：29 Pages

Intersil

Low Power 12-Bit, 250MSPS ADC

文件：857.14 Kbytes 页数：29 Pages

Intersil

Low Power 12-Bit, 250MSPS ADC

文件：1.00522 Mbytes 页数：29 Pages

Intersil

Low Power 12-Bit, 250MSPS ADC

The ISLA112P25MREP is a low-power 12-bit, 250MSPS analog-to-digital converter. Designed with Intersils proprietary FemtoCharge™ technology on a standard CMOS process. A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of various parameters such as • Programmable Gain, Offset and Skew Control\n• 1.3GHz Analog Input Bandwidth\n• 60fs Clock Jitter\n• Over-Range Indicator\n• Selectable Clock Divider: ÷1, ÷2 or ÷4\n• Clock Phase Selection\n• Nap and Sleep Modes\n• Two's Complement, Gray Code or Binary Data Format\n• SDR/DDR LVDS-Compatible or LVCM;

Renesas

瑞萨