Low Noise, Low Power I2C® Bus, 128 Taps

The ISL22346WMVEP integrates four digitally controlled potentiometers (DCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers are contro

文件：101.06 Kbytes 页数：3 Pages

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Quad Digitally Controlled Potentiometers (XDCP™) Low Noise, Low Power I2C Bus, 128 Taps

Features • Specifications per DSCC VID V62/08605-01XE • Full Mil-Temp Electrical Performance from -55°C to +125°C • Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site • Full Homogeneous Lot Processing in Wafer Fab • No Combination of Wafer Fabrication Lots in Asse

文件：206.55 Kbytes 页数：3 Pages

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Controlled Baseline with One Wafer Fabrication Site and

文件：101.06 Kbytes 页数：3 Pages

Intersil

Low Noise, Low Power I2C® Bus, 128 Taps

The ISL22346WMVEP integrates four digitally controlled potentiometers (DCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers are contro

文件：101.06 Kbytes 页数：3 Pages

Intersil

Quad Digitally Controlled Potentiometers (XDCP™) Low Noise, Low Power I2C Bus, 128 Taps

Features • Specifications per DSCC VID V62/08605-01XE • Full Mil-Temp Electrical Performance from -55°C to +125°C • Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site • Full Homogeneous Lot Processing in Wafer Fab • No Combination of Wafer Fabrication Lots in Asse

文件：206.55 Kbytes 页数：3 Pages

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Low Noise, Low Power I2C짰 Bus, 128 Taps

文件：99.4 Kbytes 页数：3 Pages

Intersil

Controlled Baseline with One Wafer Fabrication Site and

文件：101.06 Kbytes 页数：3 Pages

Intersil

Quad Digitally Controlled Potentiometers (XDCP™), Low Noise, Low Power I2C® Bus, 128 Taps

The ISL22346WMVEP integrates four digitally controlled potentiometers (DCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by • Specifications per DSCC VID V62/08605-01XE\n• Full Mil-Temp Electrical Performance from -55°C to +125°C\n• Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site\n• Full Homogeneous Lot Processing in Wafer Fab\n• No Combination of Wafer Fabrication Lots in Assembly\n• Full ;

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