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IS61NLP51236B-250B2I

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250B2L

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250B2LI

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250B3

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250B3I

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250B3L

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250B3LI

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250TQ

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250TQI

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

IS61NLP51236B-250TQL

512 K x36 and 1024 K x18 18 Mb PIPELINE NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件:1.97506 Mbytes 页数:39 Pages

ISSI

矽成半导体

技术参数

  • Organization:

    512Kx36

  • Product Type:

    No-Wait Pipeline

  • VccQ:

    2.5V/3.3V

  • Speed (MHz):

    250200

  • tKQ(ns):

    2.6

  • Package Pins:

    BGA(119)

  • Temperature Grade:

    C

  • Status:

    Prod

供应商型号品牌批号封装库存备注价格
ISSI
24+
SOT-5855&NBS
4500
只做原装正品现货 欢迎来电查询15919825718
询价
ISSI
QFP
800
正品原装--自家现货-实单可谈
询价
ISSI
25+
TQFP100
5000
询价
ISSI
16+
TQFP
762
进口原装现货/价格优势!
询价
ISSI
24+
QFP
5825
公司原厂原装现货假一罚十!特价出售!强势库存!
询价
ISSI
25+
QFP
1
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
ISSI
1650+
?
8450
只做原装进口,假一罚十
询价
ISSI
23+
NA
32587
专业电子元器件供应链正迈科技特价代理特价,原装元器件供应,支持开发样品
询价
ISSI
25+
QFP
4500
原装正品!公司现货!欢迎来电!
询价
ISSI
24+
SOP
42500
专营ISSI进口原装现货可开17增值税票
询价
更多IS61NLP51236供应商 更新时间2025-11-24 17:49:00