64K x 32, 64K x 36 SYNCHRONOUS PIPELINED STATIC RAM

DESCRIPTION The ISSI IS61LP6432A/36A is a high-speed synchronous static RAM designed to provide a burstable, high-performance memory for high speed networking and communication applications. The IS61LP6432A is organized as 64K words by 32 bits and the IS61LP6436A is organized as 64K words by 36 b

文件：110.12 Kbytes 页数：17 Pages

ISSI

矽成半导体

64K x 32, 64K x 36 SYNCHRONOUS PIPELINED STATIC RAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Pentium™ or linear burst sequence control using MODE input • Three chip enables for simple depth expansion and address pipelining • Common

文件：250.25 Kbytes 页数：17 Pages

ISSI

矽成半导体

64K x 32, 64K x 36 SYNCHRONOUS PIPELINED STATIC RAM

DESCRIPTION The ISSI IS61LP6432A/36A is a high-speed synchronous static RAM designed to provide a burstable, high-performance memory for high speed networking and communication applications. The IS61LP6432A is organized as 64K words by 32 bits and the IS61LP6436A is organized as 64K words by 36 b

文件：110.12 Kbytes 页数：17 Pages

ISSI

矽成半导体

64K x 32, 64K x 36 SYNCHRONOUS PIPELINED STATIC RAM

DESCRIPTION The ISSI IS61LP6432A/36A is a high-speed synchronous static RAM designed to provide a burstable, high-performance memory for high speed networking and communication applications. The IS61LP6432A is organized as 64K words by 32 bits and the IS61LP6436A is organized as 64K words by 36 b

文件：110.12 Kbytes 页数：17 Pages

ISSI

矽成半导体

64K x 32, 64K x 36 SYNCHRONOUS PIPELINED STATIC RAM

DESCRIPTION The ISSI IS61LP6432A/36A is a high-speed synchronous static RAM designed to provide a burstable, high-performance memory for high speed networking and communication applications. The IS61LP6432A is organized as 64K words by 32 bits and the IS61LP6436A is organized as 64K words by 36 b

文件：110.12 Kbytes 页数：17 Pages

ISSI

矽成半导体

64K x 32, 64K x 36 SYNCHRONOUS PIPELINED STATIC RAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Pentium™ or linear burst sequence control using MODE input • Three chip enables for simple depth expansion and address pipelining • Common

文件：250.25 Kbytes 页数：17 Pages

ISSI

矽成半导体

Synchronous SRAM

·4Mb, 9Mb, 18Mb, 36Mb, and 72Mb densities available\n·x18, x36, and x72 configurations available\n·Pipeline, Flow-Through, and No-Wait State (ZBT equivalent)\n·Commercial, Industrial, and Automotive Temperature support\n·ECC feature available for 4Mb product\n·250MHz speed for Pipeline\n·6.5ns acces

ISSI

矽成半导体

Package：100-LQFP；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 存储器 描述：IC SRAM 2MBIT PARALLEL 100TQFP

ISSI, Integrated Silicon Solution Inc

Package：100-LQFP；包装：托盘 类别：集成电路（IC） 存储器 描述：IC SRAM 2MBIT PARALLEL 100TQFP

ISSI, Integrated Silicon Solution Inc

Package：100-LQFP；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 2MBIT PARALLEL 100TQFP

ISSI, Integrated Silicon Solution Inc