gates Quadruple bilateral switches

DESCRIPTION The HEF4066B has four independent bilateral analogue switches (transmission gates). Each switch has two input/output terminals (Y/Z) and an active HIGH enable input (E). When E is connected to VDD a low impedance bidirectional path between Y and Z is established (ON condition). When E

文件：85.54 Kbytes 页数：8 Pages

PHI

PHI

Hex inverter

DESCRIPTION The HEF4069UB is a general purpose hex inverter. Each of the six inverters is a single stage.

文件：116.07 Kbytes 页数：7 Pages

PHI

PHI

Hex inverter

DESCRIPTION The HEF4069UB is a general purpose hex inverter. Each of the six inverters is a single stage.

文件：116.07 Kbytes 页数：7 Pages

PHI

PHI

Hex inverter

DESCRIPTION The HEF4069UB is a general purpose hex inverter. Each of the six inverters is a single stage.

文件：116.07 Kbytes 页数：7 Pages

PHI

PHI

Hex inverter

DESCRIPTION The HEF4069UB is a general purpose hex inverter. Each of the six inverters is a single stage.

文件：116.07 Kbytes 页数：7 Pages

PHI

PHI

Hex inverter

DESCRIPTION The HEF4069UB is a general purpose hex inverter. Each of the six inverters is a single stage.

文件：116.07 Kbytes 页数：7 Pages

PHI

PHI

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

PHI

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

PHI

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

PHI

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

文件：81.02 Kbytes 页数：7 Pages

PHI

PHI