16-bit D-type Transparent Latches with 3-state Outputs

Description The HD74LVC16373A has sixteen D type latches with three state outputs in a 48 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns hig

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HITACHIHitachi Semiconductor

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16-bit D-type Transparent Latches with 3-state Outputs

Description The HD74LVC16373A has sixteen D type latches with three state outputs in a 48 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns hig

文件：195.13 Kbytes 页数：10 Pages

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16-bit D-type Transparent Latches with 3-state Outputs

Description The HD74LVC16373A has sixteen D type latches with three state outputs in a 48 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns hig

文件：195.13 Kbytes 页数：10 Pages

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16-bit D-type Transparent Latches with 3-state Outputs

Description\nThe HD74LVC16373A has sixteen D type latches with three state outputs in a 48 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high ag • VCC = 2.0 V to 5.5 V\n• All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)\n• Typical VOH undershoot 2.0 V (@VCC = 3.3 V, Ta = 25°C)\n• High output current ±24 mA (@VCC = 3.0 V to 5.5 V);

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