HD74LVC125AFP资料datasheet下载批发采购-114ic电子网

型号	下载订购	功能描述	制造商上传企业	LOGO
HD74LVC125AFP	文件：300 bytes Page：1 Pages	General-Purpose Logics-RD74LVC-B Series	Renesas 瑞萨	Renesas
HD74LVC125AFPEL	文件：183.63 Kbytes Page：7 Pages	Quad. Bus Buffer Gates with 3-state Outputs Description The HD74LVC125A has four bus buffer gates in a 14 pin package. The device require the three state control input C to be taken high to put the output into the high impedance condition, whereas the device requires the control input to be low to put the output into high impedance. Low vo 文件：183.63 Kbytes 页数：7 Pages	RENESAS 瑞萨	RENESAS
HD74LVC125ATELL	文件：183.63 Kbytes Page：7 Pages	Quad. Bus Buffer Gates with 3-state Outputs Description The HD74LVC125A has four bus buffer gates in a 14 pin package. The device require the three state control input C to be taken high to put the output into the high impedance condition, whereas the device requires the control input to be low to put the output into high impedance. Low vo 文件：183.63 Kbytes 页数：7 Pages	RENESAS 瑞萨	RENESAS
IDT74LVC125A	文件：61.76 Kbytes Page：6 Pages	3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O 文件：61.76 Kbytes 页数：6 Pages	IDT	IDT
IDT74LVC125ADC	文件：61.76 Kbytes Page：6 Pages	3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O 文件：61.76 Kbytes 页数：6 Pages	IDT	IDT

更多HD74LVC125AFP供应商更新时间2025-10-30 15:35:00