HD74LV125A规格书原装现货日立Hitachi-114ic电子网

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型号	下载订购	功能描述	制造商上传企业	LOGO
HD74LV125A	文件：80.57 Kbytes Page：10 Pages	Quad. Bus Buffer Gates with 3-state Outputs Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi 文件：80.57 Kbytes 页数：10 Pages	RENESAS 瑞萨	RENESAS
HD74LV125A	文件：65.59 Kbytes Page：15 Pages	Quad. Bus Buffer Gates with 3-state Outputs Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi 文件：65.59 Kbytes 页数：15 Pages	HitachiHitachi Semiconductor 日立日立公司	Hitachi
HD74LV125AFPEL	文件：80.57 Kbytes Page：10 Pages	Quad. Bus Buffer Gates with 3-state Outputs Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi 文件：80.57 Kbytes 页数：10 Pages	RENESAS 瑞萨	RENESAS
HD74LV125ARPEL	文件：80.57 Kbytes Page：10 Pages	Quad. Bus Buffer Gates with 3-state Outputs Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi 文件：80.57 Kbytes 页数：10 Pages	RENESAS 瑞萨	RENESAS
HD74LV125ATELL	文件：80.57 Kbytes Page：10 Pages	Quad. Bus Buffer Gates with 3-state Outputs Description The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the mi 文件：80.57 Kbytes 页数：10 Pages	RENESAS 瑞萨	RENESAS
HD74LV125A_15	文件：105.76 Kbytes Page：12 Pages	Quad. Bus Buffer Gates with 3-state Outputs 文件：105.76 Kbytes 页数：12 Pages	RENESAS 瑞萨	RENESAS
HD74LV125AFPEL	文件：105.76 Kbytes Page：12 Pages	Quad. Bus Buffer Gates with 3-state Outputs 文件：105.76 Kbytes 页数：12 Pages	RENESAS 瑞萨	RENESAS
HD74LV125ARPEL	文件：105.76 Kbytes Page：12 Pages	Quad. Bus Buffer Gates with 3-state Outputs 文件：105.76 Kbytes 页数：12 Pages	RENESAS 瑞萨	RENESAS
HD74LV125ATELL	文件：105.76 Kbytes Page：12 Pages	Quad. Bus Buffer Gates with 3-state Outputs 文件：105.76 Kbytes 页数：12 Pages	RENESAS 瑞萨	RENESAS
HD74LV125A	文件：300 bytes Page：1 Pages	Standard IC>General-Purpose Logics>HD74LV-A Series	Renesas 瑞萨	Renesas

技术参数

Family.：
HD74LV-A Series
Function Gr1：
Buffer
Function Gr2：
Buffer
Function：
Quad. Bus Buffer Gates with 3-state outputs
Number of Channel：
4
Topa[Tjopa] (degC) min.：
-40
Topa[Tjopa] (degC) max.：
85
Vcc (V) min.：
2
Vcc (V) max.：
5.5
Iout (mA)：
±12
Propagation Delay (ns) max.：
6.5
Package Type：
SOP
Production Status：
Non-promotion
Downloadable：
IBIS

供应商	型号	品牌	批号	封装	库存	备注	价格
深圳市安富世纪电子有限公司	HD74LV125A	HITACHI/日立	23+	TSOP	6500	专注配单,只做原装进口现货	询价
深圳市一线半导体有限公司	HD74LV125AFP	HIT	24+	SOP5.2mm	10		询价
深圳市恒创达实业有限公司	HD74LV125ATELL	HIT	17+	TSSOP-14	6200		询价
中天科工半导体（深圳）有限公司	HD74LV125ATELL	HIT	20+	TSSOP-14	38560	原装优势主营型号-可开原型号增税票	询价
深圳市英卓尔科技有限公司	HD74LV125ATELL	HIT	20+	TSSOP	2960	诚信交易大量库存现货	询价
深圳市威尔健半导体有限公司	HD74LV125ATELL-E	RENESAS/瑞萨	23+	TSSOP16	50000	全新原装正品现货,支持订货	询价
贸泽芯城（深圳）电子科技有限公司	HD74LV125ATELL	HITACHI日立	23+	TSSOP-16	3543	一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、	询价
深圳市威雅利发展有限公司	HD74LV125ATELL	HIT	01+	TSSOP-14	1580	一级代理,专注军工、汽车、医疗、工业、新能源、电力	询价
深圳市亿联芯电子科技有限公司	HD74LV125ATELL	HITACHI/日立	2023+	TSSOP16	1900	专注全新正品,优势现货供应	询价
深圳庞田科技有限公司	HD74LV125ATELL	HITACHI	2023+环保现货	TSSOP	8000	专注军工、汽车、医疗、工业等方案配套一站式服务	询价

更多HD74LV125A供应商更新时间2025-11-19 15:01:00

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